Linera, provides customized IP-core development services for your FPGA or ASIC designs.

Our team can provide a turn-key solution for your IP-cores. Our IP-cores are delivered as a complete design that adheres to your specifications after going through our design, development with Verilog or VHDL, Place/Route and timing analysis and verification processes. In addition, as needed, we can use high-level modelling and code generation tools to do system/algorithm modelling such as Simulink/Xilinx System Generator.

Your IP-cores can be designed as FPGA-family independent. If required, an IP-core will be optimized for a particular FPGA family or model. All our IP-cores are delivered with target FPGA utilization, timing data, and if required, placement data.

Linera is also proficient in developing verification IP-cores. For example, we can design and implement a Bus-functional-model of a system that will drive or will be driven by your design, and integrate this BFM to your verification infrastructure.

Please contact us to get more information on our IP-core development services.